This Call for Papers is addressed mainly to participants who wish or intend to contribute a reseacher paper to the technical sessions scheduled to be held from the 2nd day of the Symposium.
Participants who wish or intend to contribute any opinion or comment on the ceremonial functions for commemorating the 10th Anniversary of Saigon High-Tech Park (SHTP) are requested to specifically express such wish/intention. Their contribution will be duly forwarded to the Ceremonial Preparatory Committee for appropriate decision.
The symposium will include a plenary session, tutorials, technical sessions and panel discussions. The symposium serves not only as a forum for scientific and technical exchange among researchers and experts, to bring together scientists and engineers engaged in research, development, manufacture and applications of VLSIs, but also as a state-academy-industry communication platform among political, economical, industrial and entrepreneurial leaders on a concerted effort in contributing to the development of Vietnam’s VLSI industry.
Prospective authors are requested to submit electronically abstracts of their intended papers for screening first, then the 6 – 8 page papers after acceptance of the abstracts. The presentation time, including discussion, is as follows: Plenary talk – 40 minutes, Invited talk -30 minutes, Oral Presentation – 20 minutes.
All papers recommended either by the related technical committee or by other participants will undergo peer-review for publication in one of the following journal with ISI:
International Journal of Electronics (Taylor & Francis, Print ISSN: 0020-7217, http://www.tandf.co.uk/journals/TETN)
Official language: English.
Official e-mail address: all communications including inquiries, registration and submission of abstracts and/or papers, are to be sent to email@example.com
SCOPE OF PAPERS
|Session on Integrated Circuits (code: IC)
Session on Device and IC technology (code: ICT)
|Session on Intergrated Systems (code: IS)
Session on Applications (code: APP)
|Session on State-of-the-art System Level LSI Design Methodology (organized by Prof. Hiroshi Ochi, Kyushu Institute of Technology, Japan)|
|Deadline for Abstract Submission||June 30, 2012|
|Deadline for Full Paper (IEEE Compatible Format) Submission||July 30, 2012|
|Deadline for Author Registration||July 15, 2012|
Please click this link to download a list of accepted papers.