Ph.D., Univ. of Texas
MSEE, Univ. of Texas
- MediaTek VP of Technology
- GM, High-performance Processors Technology (HPT)
- IEEE Fellow, 2011
- Texas Instruments
- TI Senior Fellow, 2005
- Technical leadership: Ultra-Low Power (ULP) design
- OMAP Processors & Smart Reflex™ Innovations of Power & Perf. Technology
- TI Fellow, 2000
- TMS320C55x: Industry’s most energy-efficient DSP Processors
- TI486 & 586: x86-compatible processors
- TMS320C10, C25: DSP Processors
- National & Industrial awards: 12 (incl. Asian American Engr. of the Year 2006)
Publications: 48 US Patents, 44 papers
Uming Ko, MediaTek VP of Technology
With the landmark introduction of Smartphone in 2007, Mobile Internet and computing took off and the associated data bandwidth has ever-since grown exponentially resulting in the ever-increasing computing requirements. However, mobile CPU will soon hit the frequency and thermal limits. Thus, mobile clients are rapidly moving to multi-core CPU/GPU with system-adaptive power management, thermal throttling, and heterogeneous multi-processing. The insatiable computation need, coupled with the explosion of Internet-of-Things (IoT) that demands long battery operation, further presents major thermal and energy gaps. Consequently, many innovations are desperately needed to enable the ubiquitous ecosystem that promises to provide ample possibilities to enhance and enrich everyone’s life.
Sony Semiconductor Solutions Corporation, Atsugi, Japan
Yoshikazu Nitta received the B.S. and M.S. degrees in electronic engineering from Tohoku University, Sendai, Japan, in 1986 and 1988, respectively. He joined Mitsubishi Electric Corporation, Amagasaki, Japan, in 1988. From 2006 to 2016, he was with Sony Corporation, Atsugi, Japan, where was engaged in the development of CMOS image sensors. Since 2016, he has been with Sony Semiconductor Solutions Corporation, where he is currently a general manager in charge of technology development of CMOS image sensor.
Yoshikazu Nitta, Sony Semiconductor Solutions Corporation
Charge Coupled Device image sensors have made remarkable contributions to the performance and promotion of the camcorders and digital still cameras as key devices. CMOS Image sensors have provided high frame rate, low power consumption and high signal-to-noise ratio performance through the column-parallel analog-to-digital converters and back-illuminated technologies. With the introduction of these technologies, CMOS image sensors have widely used in not only mobile phones, but also surveillance cameras, industrial use and so on. As stacked CMOS image sensors continue to enhance functionalities, they can enlarge the value of image information in an image capturing field.
Evolution of CMOS imaging technologies, such as pursuing high sensitivity, high frame rate, and extending detectable wavelengths and depth resolution, will create attractive values in the present imaging world and the future sensing world.
Ph.D. in Electrical and Computer Engineering
Thang Tran, Synopsys Inc.
Microprocessor is resilient with many lives. The first life is the high performance x86 microprocessor which is dominated by Intel and AMD. The second life is the low-power ARM microprocessor; ARM CortexA72 signified the end-of-life for ARM microprocessor. The next life is configurable microprocessor which is dominated by Synopsys and Cadence. ASIP is lurking in the future.
Dissertation: “Superscalar Microprocessor Architecture with Multi-Bit Scoreboard Technique”
- 140+ granted patents in architecture, logic, circuit, and locking 20+ pending patent applications
- Member of Technical Staff: Leading system-level cache design, next generation ARC microprocessor, and hardware architecture for Embedded Vision.
- Distinguished Member of Technical Staff: Leading high performance and low power PowerPC microprocessor for networking application, MediaTek Inc.
- Senior Microprocessor Design: Leading Application-Specific-Instruction-set-Processor (ASIP) design for mobile devices.
- Senior Member of Technical Staff: Leading ARM CortexA8 microprocessor design and ASIP microprocessor for Digital Radio Processing, Centaur Technology.
- Senior Microprocessor Design: Leading SIMD Unit design for low power x86 microprocessor, Analog Devices Inc.
- Senior Microprocessor Design: Leading high performance DSP processor design, Intel.
- Senior Principal Engineer
Microprocessor architect for next generation x86 microprocessor design.
Publications and Papers
Many internal technical papers and conference presentations at Texas Instruments, Freescale Semiconductor, and MediaTek.
- “Comparative Analysis of Decoding and Caching of x86 Instructions”, 5th International Conference on Advanced Computing, 1997
- “Limitation of Superscalar Microprocessor Performance”, 25th International Symposium on Micro-Architecture, 1992
- “Microprocessor Architecture with Multi-Bit Scoreboard Concurrency Control”, 20th International Conference on Parallel Processing, 1991
Ph.D., Senior Researcher
Nanoelectronics Research Institute, National Institute of
Advanced Industrial Science and Technology (AIST)
1-1-1 Umezono, AIST Tsukuba Central 2, Tsukuba, 305-8568, JAPAN
Sommawan Khumpuang received MSc. degree in Mechanical Engineering from University of Bristol, UK in 2002. She studied Ph.D in silicon processing technologies and synchrotron radiation lithography at Ritsumeikan University, Japan and received her Ph.D in 2006. She joined the Microsystems Materials Laboratory of IMTEK, Germany as a post-doctoral fellow in 2007 for a research in Microneedle and its replication research of Alexander von Humboldt foundation. In 2009, she has become a research at BEANS laboratory in Japan carrying the research in electronic textiles field. Since 2011, she became a researcher at National Institute of Advanced Industrial Science and Technology, AIST, Japan at the same time that Minimal System group was established. She implemented the first set of Minimal photolithography machines and realized the first MEMS and transistor devices using Minimal machines. She is responsible person to all the device process technologies based on Minimal Fab platform. She holds several patents in Minimal Fab area and published pioneering journal-papersinternational of Minimal Fab process technology.
Sommawan Khumpuang, Nanoelectronics Research Institute, National Institute of Advanced Industrial Science and Technology (AIST), Japan
The minimal fab concept was designed in order to achieve brand-new semiconductor fab whose investment cost is 1/1,000 of a conventional mega fab. The targets of minimal fab are device markets with high-variation and low-volume. The minimal fab has three important features. (1) The wafer diameter is a half inch. (2) Each process tool size is 294 mm wide × 450 mm deep × 1440 mm high. (3) No clean room is needed due to the use of local clean technology. This paper describes the concept, development of minimal equipment, and the fabrication of devices using the equipment.